The inventive concepts disclosed herein relate to an integrated circuit device and a method of manufacturing the same, and more particularly, to an integrated circuit device including a through-silicon via (TSV) structure and a decoupling capacitor, as well as a method of manufacturing the same.
A TSV technology for forming a vertical electrical connection passing through a substrate, a die, or the interposer has been considered very important in the development of a three-dimensional (3D) package and a 2.5D package. In a 3D package, a plurality of semiconductor chips are vertically mounted in one semiconductor package. In a 2.5D package, a through-silicon via (TSV) is not applied to an active chip, but to a passive silicon interposer that has a chip flip-chip bonded on the interposer. In order to improve the performance and reliability of 3D and 2.5D packages, there is a need for technology solving a problem caused by a Cu diffusion phenomenon in a TSV structure that includes a Cu contact plug. It would also be desirable to form a device capable of providing stable operating characteristics and high reliability. There is also a need for an integrated circuit device capable of providing higher integration in the 3D or 2.5D package using the TSV structure, along with providing higher reliability of the TSV.